1. Field of the Invention
The present invention relates to a memory and operating method thereof. More particularly, the present invention relates to a non-volatile memory and operating method thereof.
2. Description of the Related Art
Among the various types of non-volatile memory products, electrically erasable programmable read only memory (EEPROM) is a memory device that has been widely used inside personal computer systems and electron equipment. Data can be stored, read out or erased from the EEPROM many times and stored data are retained even after power supplying the devices is cut off.
Typically, the floating gates and the control gates of the EEPROM non-volatile memory are fabricated using doped polysilicon. When data is programmed into the memory, the electrons injected into the floating gate will be evenly distributed throughout the entire polysilicon floating gate layer. However, if the tunneling oxide layer underneath the polysilicon gate contains some defects, a leakage current may develop leading to possible reliability problems in the device.
To prevent problems in operating the EEPROM due to leakage current, the conventional method is to use a charge-trapping layer instead of the polysilicon floating gate. The charge-trapping layer is fabricated using silicon nitride, for example. In general, the silicon nitride charge-trapping layer is sandwiched between a silicon oxide layer on top and another silicon oxide layer below to form an oxide/nitride/oxide (ONO) composite dielectric layer within a stack gate structure. An EEPROM having this type of stack gate structure is known as a nitride read-only-memory (NROM).
However, in the conventional technique, the storage unit for holding electric charges is normally flattened on a surface. With the ever-increasing demand for a higher level of integration for the devices, this flattened configuration is an important barrier to the miniaturization of the NROM devices. Furthermore, it is difficult to erase the electrical charges accumulated close to the central location of the channel for a planar storage unit.
In addition, the source and drain regions in the substrate of a conventional non-volatile memory device is formed by performing a doping operation. Hence, the production cost is increased beside the addition of one more doping operation.
On the other hand, it is important to find a method capable of increasing the programming speed of a non-volatile memory device and reducing the current required to program the memory device.